Memory hierarchy.You are building a system around a processor with in-order execution that runs at 1.1GHz. The only instructions that read or write data from memory are loads (20% of allinstructions) and stores (10% of all instructions). The memory system for thiscomputer is composed of a split L1 cache that imposes no penalty on hits.• Both the I-cache and D-cache are direct-mapped and hold 32 KB each.• The I-cache has a 2% miss rate and 32-byte blocks, and the D-cache is write-through with a 5

Even More Memory Hierarchy | Computation Structures | Electrical Engineering and Computer Science | MIT OpenCourseWare

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