电子工程专辑

一文看懂FPGA芯片产业链及竞争格局

FPGA（Field Programmable Gate Array）芯片基于可编程器件（PAL、GAL）发展而来，是半定制化、可编程的集成电路。 发明者：赛灵思联合创始人Ross Freeman于1984年发明FPGA集成电路结构。全球第一款商用FPGA芯片为赛灵思XC4000系列FPGA产品。 FPGA芯片按固定模式处理信号，可 ...
电子工程专辑

高云半导体访谈：国产FPGA公司如何在全球FPGA市场进行差异化竞争？

随着5G、AI和云计算平台的兴起，高性能FPGA在这些新兴市场又找到了新的机遇。然而，全球两家最大的FPGA公司却无法独立存在，这是否意味着FPGA无法成为独立的市场呢？国产FPGA厂商在高端市场难以跟英特尔和赛灵思竞争，而在中低端市场又有什么机会呢？
Electronic Design

Best practices for user-programmable FPGA instrumentation

Field programmable gate arrays (FPGAs) are used extensively in today’s electronic assemblies and test engineers are also choosing to incorporate user-programmable FPGA instrumentation as part of their ...
EDN

Static FPGA’s Can Take Advantage of Dynamic Reconfiguration

Instant on and ready to go can be a selling point when choosing an FPGA. A part that powers up ready to roll has some advantages over statically configured FPGA's that need to be loaded and ...
Design-Reuse

Developing processor-compatible C-code for FPGA hardware acceleration

FPGAs are becoming increasingly popular with software teams to accelerate critical portions of their code. In most cases these teams already have processing stacks and applications written in C that ...
Geeky Gadgets

Intel Cyclone 10 FPGA and STM32H7 MCU combined to create USB2IO high-speed interface explorer

MCU – STMicro STM32H743 Arm Cortex-M7 @ 480MHz CPU clock An external 64MB QSPI flash for extra FPGA code storage; FPGA – Intel Cyclone 10LP (10CL040) with 40k logic elements, 1,134 Mbit embedded ...
Design-Reuse

A practical approach to reusing HDL code in FPGA designs

From the very first day that you learn a new hardware description language (HDL), you reuse code. Initially, this might involve copying an example and modifying it in order to learn and expand your ...
EDN

Timing Closure on FPGAs

Have you ever written code that behaves correctly under a simulator only to have intermittent failures in the field? Or maybe your code no longer functions properly when you compile with a newer ...